Beyond CMOS: Ternary and mixed radix CNTFET circuit design, simulation and verification
Journal article, Peer reviewed
Accepted version
Permanent lenke
https://hdl.handle.net/11250/3051315Utgivelsesdato
2022Metadata
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Originalversjon
Bos, S., Risto, H. N. & Gundersen, H. (2022, 27. mai-1. juni). Beyond CMOS: Ternary and mixed radix CNTFET circuit design, simulation and verification [Paperpresentasjon]. 2022 IEEE International Symposium on Circuits and Systems (ISCAS), Austin, TX. https://doi.org/10.1109/ISCAS48785.2022.9937259Sammendrag
For three-valued or ternary computing to be an alternative for binary, new multiple valued logic (MVL) electronic design automation (EDA) tools are needed. In this article we present a novel MVL logic synthesis tool to generate binary, ternary and hybrid (mixed radix) circuits using carbon nanotube FETs (CNTFETs). The web-based open source EDA tool aids in design, simulation and verification aspects including a direct netlist export to HSPICE. We demonstrate a fundamental building block of a balanced ternary computer using the tool, a ternary D flip-flop. We show that mixed radix design can reduce transistor count.