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dc.contributor.authorNowbahari, Arian
dc.contributor.authorMarchetti, Luca
dc.contributor.authorAzadmehr, Mehdi
dc.date.accessioned2022-11-23T13:41:46Z
dc.date.available2022-11-23T13:41:46Z
dc.date.created2022-11-19T02:24:03Z
dc.date.issued2022
dc.identifier.citationNowbahari, A., Marchetti, L., & Azadmehr, M. (2022). Analysis of a Low Power Inverting CMOS Schmitt Trigger Operating in Weak Inversion. IInternational Journal of Electrical and Electronic Engineering & Telecommunications, 11(6), 392-397.en_US
dc.identifier.issn2319-2518
dc.identifier.urihttps://hdl.handle.net/11250/3033700
dc.description.abstractThis article analyzes the operation of a low power inverting CMOS Schmitt trigger in weak inversion. The analysis is based on an earlier proposed analytical model, which relates the hysteresis voltages to the transistors' dimensions, the supply voltage, and the temperature. The maximum error between the analytical and simulated transition voltages is below 10%, relative to the supply voltage. By optimizing the device sizes, the error reduces to 4%. The operation of the Schmitt trigger in weak inversion is also experimentally validated through an ASIC fabricated in AMS 0.35μm CMOS process. The maximum error between the modeled and measured transition voltages is below 7%. Furthermore, the power consumption as a function of the supply voltage is analyzed. Overall, the proposed model may be used to optimize the operation of the analyzed Schmitt trigger circuit for low power operation.en_US
dc.language.isoengen_US
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internasjonal*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/deed.no*
dc.titleAnalysis of a Low Power Inverting CMOS Schmitt Trigger Operating in Weak Inversionen_US
dc.typePeer revieweden_US
dc.typeJournal articleen_US
dc.description.versionpublishedVersionen_US
dc.rights.holder© 2022 Int. J. Elec. & Elecn. Eng. & Telcomm./ © 2022 by the authors.en_US
dc.source.pagenumber392-397en_US
dc.source.volume11en_US
dc.source.journalInternational Journal of Electrical and Electronic Engineering & Telecommunications (IJEETC)en_US
dc.source.issue6en_US
dc.identifier.doihttps://doi.org/10.18178/ijeetc.11.6.392-397
dc.identifier.cristin2076669
cristin.ispublishedtrue
cristin.fulltextoriginal
cristin.qualitycode1


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Attribution-NonCommercial-NoDerivatives 4.0 Internasjonal
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