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dc.contributor.advisorMarchetti, Luca
dc.contributor.authorMakhasya, Samjhana
dc.date.accessioned2021-10-08T16:41:21Z
dc.date.available2021-10-08T16:41:21Z
dc.date.issued2021
dc.identifierno.usn:wiseflow:2519665:42204655
dc.identifier.urihttps://hdl.handle.net/11250/2788799
dc.descriptionFull text not available
dc.description.abstractThe growing demand for the smallest feature size transistor introduces new challenges such as short channel effects. It becomes difficult to fabricate transistors with the increasing challenge of doping within the nano range (~ 10nm). In 1920 AD, a transistor without a junction was introduced to overcome these challenges. They have a near-ideal subthreshold slope, low leakage currents, and less electron mobility degradation with gate voltage and temperature. The prospect of the master thesis is to fabricate and characterize the SnO2 JLT. A suitable deposition parameter for SnO2, used as an active layer for a JLT in this work, is investigated. The crystal structure of deposited SnO2 is determined using XRD. EDX is used to find a chemical composition. Hall Measurement is used to investigate film electron mobility and determine the type of deposited film, whether n-type SnO2 or p-type SnO. Four Probe is used to calculate the SnO2 deposited film resistivity. An interferometer is used to investigate the roughness of the deposited film and Ellipsometry for film thickness. The fabrication is carried out by performing surface micromachining on SiO2 substrate. SiO2 is used as a gate dielectric layer, while aluminium is used as electrodes for drain, source, and gate. The different size of transistors was fabricated within the range of 10-1000μm. Ultimately, the project aims to establish the fabrication of the JLT in our facilities. In fact, the fabrication of the JLT represents the first attempt to realize a transistor in our university. This thickness of the SiO2 layer is 25nm, and electrodes are 30nm. The thickness of SnO2 film is 25nm. Two different fabrication approaches are adapted, one using the fabrication sequence of gate and gate dielectric, active layer followed by drain and source and another having fabrication sequence of the active layer, drain, and source followed by gate dielectric layer and gate fabrication. The fabricated JLT is tested using the Keithley source meter to determine its IV characteristics curve. The measured results showed that the fabricated SnO2 active layer is very resistive. The current flow is too low to be measured with the lab equipment at USN. Thus, further characterization is carried out to investigate the faulty JLT and improve the SnO2 property.
dc.languageeng
dc.publisherUniversity of South-Eastern Norway
dc.titleFabrication and Characterization of SnO2 Junctionless transistor
dc.typeMaster thesis


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