Local Synthesis of Carbon Nanotubes on CMOS-MEMS Microheaters for Sensing Applications

Abstract

Research on nanomaterials is growing rapidly due to their extraordinary properties, which can significantly differ from their bulk form. The physicochemical properties of nanoscale materials are diverse and can be engineered for utilizing them in numerous applications to advance our technology. Among the nanomaterials, carbon nanotube (CNT) is a popular candidate as a sensing material, which demonstrated promising results for potential commercial applications. A monolithic CMOS-CNT integration can provide sensing features through the CNTs on the top and read-out integrated circuits (ROICs) based on CMOS transistors in the bottom. CNTs can be locally grown on custom-designed CMOS microstructures to utilize their sensing capabilities in emerging micro and nanotechnology applications. The main goal of this PhD project was to develop a CMOS-compatible CNT synthesis process on microheaters designed and fabricated in commercial CMOS chips with the vision of enabling the pathway for mass production of CNT-based sensors. Prior to designing a dedicated CMOS chip for CNT growth, thermal-mechanical simulations were performed on CMOS material layers that can generate the required CNT synthesis temperature (~650-900 ˚C) by joule heating. The simulated microheaters showed promising results with high thermal isolation to keep low ambient temperatures for CMOS-compatibility. Among the investigated CMOS materials, polysilicon is most suitable as heaters for high-temperature applications, while the metal options (i.e., Al, Cu) need alloying with Ni. A CMOS chip with various polysilicon and aluminium microheaters was designed and fabricated in a commercial AMS 350 nm CMOS technology. Different designs also incorporate various features for realizing CMOS-MEMS heaters with varied postprocessing results. A key contribution to the CMOS-CNT integration was the developed post-processing of CMOS chips for fabricating CMOS-MEMS heaters. In this post-CMOS processing, subtractive microfabrication technique was used for micromachining the heaters, where the passivation layers in CMOS were used as mask to protect the electronics. For the dielectric etching, high selectivity, uniform etching and good etch rate was required to fully expose the polysilicon layers without causing damages. It was achieved by developing two-step reactive ion etching (RIE) of SiO2 dielectric layer and making design improvements on a second-generation CMOS chip. Partial and fully suspended CMOS-MEMS microheaters were also fabricated by SiO2 wet etching with minimum damage to the exposed aluminium layers. CNTs were successfully synthesized on the polysilicon CMOS-MEMS heaters in a local thermal CVD process. The heaters had low CNT growth temperatures (~650 – 750 ˚C) before a breakdown, resulting in low yield with Fe catalyst. Growth with Ni provided higher yield with relatively lower diameter (˂ 20 nm). CNT growth was investigated on various non-suspended and suspended microheaters. Adding H2 reduction gas improved growth quality. The growth process needs further development to grow longer CNTs within the obtained temperatures. Thermal instability issues of thin polysilicon layers were addressed, which made the CNT growth process challenging. Synthesized CNTs on two neighbouring heaters established a connection through the Si substrate; one of which was utilized to demonstrate gas and pressure sensing. To the author’s knowledge, this is the first demonstration report for sensing applications using locally synthesized CNTs on the polysilicon layers of a commercial low-cost bulk CMOS technology. Two CMOS microstructures were calibrated for on-chip temperature sensing. Results show that chip temperature ranging from room-temperature to 200 ˚C can be estimated with a deviation below 2 ˚C between the two sensors, while the deviation increases with higher temperature. Two on-chip transistors were also characterized upon heat exposure from different polysilicon microheaters that were used for CNT synthesis. Apart from one case, behaviour of the transistors did not change. Hence, CMOScompatibility was confirmed for majority of the non-suspended CMOS-MEMS CNT growth structures. Our developed process for heterogenous monolithic integration of CMOS-CNT shows the promise of wafer-level manufacturing of CNT-based sensors by incorporating additional steps in an already existing foundry CMOS process.