Carbon Nanotube Growth on the Polysilicon Layers of CMOS
Peer reviewed, Journal article
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2023Metadata
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Original version
Roy, A., & Aasmundtveit, K. E. (2023, 2.-5. juli). Carbon Nanotube Growth on the Polysilicon Layers of CMOS. 2023 IEEE 23rd International Conference on Nanotechnology (NANO), Jeju City, Korea. https://doi.org/10.1109/NANO58406.2023.10231182Abstract
Direct synthesis of CNTs in an established IC technology such as CMOS can effectively utilize CNT properties in smart sensing applications. With that vision, we designed and fabricated polysilicon microheaters in CMOS chips to grow CNTs by thermal chemical vapor deposition (CVD). CNTs were synthesized in high density on two identical Poly1 and Poly2 heaters with an effective joule heating area of 24μm x 50 μm. The applied electrical power for the heaters ranged from 1250 mW (Poly1) to 1600 mW (Poly2) during the CNT growth process. Diameter of the synthesized CNTs were mostly in the range of ~20 nm for the Poly1 substrate and ~10 nm for the Poly2 substrate. A stacked Poly1-Poly2 heater has also been used for growing CNTs with various diameters.