Memristor Implementation of a Ternary Storage Circuit
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This thesis presents two circuits capable of writing ternary data to a memristor, and reading that data without corrupting it. It also investigated how the mean metastable switch memristor model with modi_ed parameters, simulated in LTspice can recreate the behaviours observed in Knowm SDC W/tungsten memristors. How the model can simulate ternary memristor memory, and what limitations the model presents. Initial experimentation on the e_ect of changes to the parameters of various models were analyzed before the MMSS model was selected, and the parameters were tuned until a behavioral match was validated. Using the model as a tool, development of the _rst ternary circuit resulted in a circuit capable of writing trits to a memristor and read them without the need of a waveform generator. Knowledge from the design was then applied to the second circuit and simulation results from this circuit was part of the work published in a paper. Analysis of the simulation and breadboard results was then used to show that the MMSS model was good at matching the behaviour of imouts to the Knowm SDC memristor , bot that with the selected parameters it was unsieted for time analysis due to drift.