Vis enkel innførsel

dc.contributor.authorMirmotahari, Omid
dc.contributor.authorBerg, Yngvar
dc.date.accessioned2016-06-10T13:15:30Z
dc.date.accessioned2016-10-21T09:01:32Z
dc.date.available2016-06-10T13:15:30Z
dc.date.available2016-10-21T09:01:32Z
dc.date.issued2015
dc.identifier.citationCircuits and Systems 2015, 6(5):121-135nb_NO
dc.identifier.issn2153-1293
dc.identifier.urihttp://hdl.handle.net/11250/2416833
dc.description.abstractIn this paper, we present a solution to the ultra low voltage inverter by adding a keeper transistor in order to make the semi-floating-gate more stable and to reduce the current dissipation. Moreover, we also present a differential ULV inverter and elaborate on the reliability and fault tolerance of the gate. The differential ULV gate compared to both a former ULV gate and standard CMOS are given. The results are obtained through Monte-Carlo simulations.nb_NO
dc.language.isoengnb_NO
dc.rightsNavngivelse 3.0 Norge*
dc.rights.urihttp://creativecommons.org/licenses/by/3.0/no/*
dc.titleReliability of High Speed Ultra Low Voltage Differential CMOS Logicnb_NO
dc.typeJournal articlenb_NO
dc.typePeer reviewed
dc.date.updated2016-06-10T13:15:30Z
dc.identifier.doi10.4236/cs.2015.65013
dc.identifier.cristin1244200


Tilhørende fil(er)

Thumbnail

Denne innførselen finnes i følgende samling(er)

Vis enkel innførsel

Navngivelse 3.0 Norge
Med mindre annet er angitt, så er denne innførselen lisensiert som Navngivelse 3.0 Norge